一种同时多线程指令队列竞争缓解策略

A Kind of Instruction Queue Competition Easing Strategy for Simultaneous Multi threading Architecture

摘要:

同时多线程结构利用线程级并行和指令级并行的优势，提高了指令吞吐率，但线程对关键资源（如指令队列）的竞争会削弱这种优势，造成资源浪费，又会降低处理器性能.提出了指令队列利用参数，通过分析指令队列利用率与处理器性能的关系，用实验评估了在四线程情况下，典型静态指令队列竞争缓解策略（如Dwarn,2OP_Block,Static）及其组合对处理器性能的影响.给出了load依赖链模型，分析了基于load依赖链的基准程序线程特性，提出了一种结合线程特性的指令队列竞争缓解策略.实验结果表明，该策略能够加速执行指令吞吐率较高的线程，通过提升此类线程的性能使整体指令吞吐率进一步增加.

Abstract:

The simultaneous multi threading (SMT) technique boosts instructions per clock (IPC) by adopting thread level parallelism and instruction level parallelism. However, the competition of key resources between threads do weaken such advancement. Instruction queue (IQ) is proved as one key resource and its competition always results into performance degradation. Typical IQ competition easing strategies include Dwarn, 2OP_Block and Static. This paper presets two IQ utilization parameters to estimate the relationships between IQ usage and system performance. Competition easing capability of typical IQ strategies and their combination are compared. A load dependency chain model is built and analysis of thread characteristics based on the model is given. Then a new IQ competition easing strategy combining with thread characteristics is proposed. The experimental results show that such strategy can achieve total IPC improvement by accelerating high IPC threads.