Abstract:In this paper, a selected transition time adjustment (STTA) based router is designed for the reliable network on chip. The router can predict crosstalk induced faults on interconnects accurately and tolerate these faults through staggering the signal transition time. Then a dual interlocked cell (DICE) is used to preserve all registers in the router from single event upset (SEU). The results show that the router can tolerate large crosstalk induced faults and SEU with only extra 46% area overhead and 70% power dissipation of a normal router. Compared with TS HC TMR and SCAC TMR based router, the router saves 93% area and 55% power overhead at least, which solves the huge overhead problem for reliable network on chip (NOC) routers effectively.